1. Field of the Invention
The present invention generally relates to wiring boards and semiconductor devices. More specifically, the present invention relates to a wiring board where an electronic component such as a semiconductor element is mounted and a semiconductor device where the semiconductor element is mounted on the wiring board by bump connection.
2. Description of the Related Art
There is a semiconductor device where a semiconductor integrated circuit element (hereinafter “semiconductor element”) is mounted on a wiring board by using convex (projection) outside connection terminals called wire bumps. Insulating resin such as glass epoxy resin is used for a base part of the wiring board. Conductive layers made of copper (Cu) or the like are selectively provided on a main surface of the wiring board. The convex (projection) outside connection terminals provided on a main surface of the semiconductor element are connected to the conductive layers of the wiring board. Outside connection terminals such as spherical electrode terminals are provided on surfaces of electrodes selectively formed on another main surface of the wiring board.
In the above-mentioned semiconductor device, the semiconductor element is mounted on the wiring board in a so-called flip-chip (face-down) state.
In such a flip-chip mounting structure, in order to protect a circuit forming surface of the semiconductor element and the convex (projection) outside connection terminals so that connection reliability is improved, an underfill material made of mainly epoxy resin is supplied to a space between the circuit surface of the semiconductor element and the wiring board, and a part or the entirety of an outer periphery side surface of the semiconductor element is covered with the underfill material. Under this structure, connection between the semiconductor element and the wiring board is reinforced.
The underfill material fills the space between the circuit surface of the semiconductor element and the wiring board from a periphery of the semiconductor element after the semiconductor element is mounted on and connected to the wiring board. Alternatively, the underfill material is applied on the wiring board in advance and the semiconductor element is mounted on the wiring board via the underfill material so that the underfill material is provided between the circuit surface of the semiconductor element and the wiring board.
It may be necessary to selectively provide the underfill material on the wiring board.
In order to selectively provide the underfill material on the wiring board, a structure shown in FIG. 1 is suggested, for example. That is, a dam is provided so as to surround a mounting area of the wiring board on an upper surface of the wiring board.
Here, FIG. 1 shows a state where the semiconductor element is flip-chip mounted on the wiring board and the dam is provided so as to surround the mounting area of the semiconductor element. FIG. 1(b) shows a cross section taken along a line X-X of FIG. 1(a). In addition, illustration of outside connection terminals selectively provided on a rear surface of the wiring board is omitted in FIG. 1.
In a semiconductor device 10 shown in FIG. 1, a semiconductor element 4 is flip-chip mounted on bonding terminals 2 provided on a main surface of the wiring board 1 via convex (projection) outside connection terminals 3. In addition, an underfill material 5 is supplied and provided in a space between the semiconductor element 4 and the main surface of the wiring board 1 and at an outer periphery side surface of the semiconductor element 4.
Furthermore, a dam 6 is provided on the main surface of the wiring board 1 so as to surround a mounting part of the semiconductor element 4. Because of the dam 6, the flow of the underfill material 5 is dammed and a providing area of the underfill material 5 is formed.
Sloped parts A of the underfill material 5 formed in the periphery of the semiconductor element 4 are called fillets. The fillet mitigates local stress concentration on a connection part of the bonding terminals 2 and the convex (projection) outside connection terminals 3 due to the difference of coefficients of thermal expansion between the wiring board 1 and the semiconductor element 4. As a result of this, reliability of connection between the wiring board 1 and the semiconductor element 4 is improved.
Under this structure, it is possible to block flowing-in of the underfill material 5 by the dam 6 even if a terminal for mounting another electrical component is close to the mounting part of the semiconductor element 4 on the wiring board 1.
In addition, by forming the dam 6 with designated height, the thickness (height) of the underfill material 5 can be controlled to have a designated value.
For example, a structure where a resin flow prevention frame is provided is suggested in Japanese Laid-Open Patent Application Publication No. 8-97535. The resin flow prevention frame surrounds an electronic component housing, amounting part and bonding holes provided on a printed wiring board. The resin flow prevention frame has an inside surface having a zigzag or continuous concave and convex shaped configuration.
A semiconductor device having a mounting substrate where an electrode pad is formed around a rectangular chip mounting region and a dam is provided between the chip mounting region and the electrode pad; a semiconductor chip flip-chip mounted on the chip mounting region of the mounting substrate; and an underfill material filling in between the mounting substrate and the semiconductor chip, is suggested in Japanese Laid-Open Patent Application Publication No. 2005-276879. In the semiconductor device, the distance between the predetermined side of the chip mounting region onto which the underfill material is dropped upon the manufacturing of the semiconductor device and the dam corresponding to the side is longer than the distance between another side of the chip mounting region and the dam corresponding to the other side.
A wiring board where an underfill material is provided for mounting an electronic component is suggested in Japanese Laid-Open Patent Application Publication No. 2006-140327. The wiring board has a solder land and a dam land. The solder land is connected to an outside connection terminal of the electronic component via solder. The dam land is provided in the periphery of a mounting area of the electronic component and is based for forming the solder dam. The electronic component can be mounted even outside of the solder dam.
A printed wiring board having the following structure is suggested in Japanese Laid-Open Patent Application Publication No. 2005-175113. This printed wiring board has a board body in which an IC chip is mounted and a board conductor connected to an electrode of the IC chip is formed, and an insulating passivation film which is formed on the board body and has an opening at a mounting position of the IC chip. The distance between each side of the external shape of the IC chip and the opening edge of the insulating passivation film is 0.2 to 0.5 mm. Further, the corner of the opening is locally widely perforated.
However, the above-discussed related art structure where a dam configured to block the flow of the underfill material and having a size larger than the semiconductor element surrounds the mounting area of the semiconductor element on the upper surface of the wiring board has the following problems.
The problems of the related art structure where the dam is provided on the upper surface of the wiring board so as to surround the mounting area of the semiconductor element are discussed with reference to FIG. 2 through FIG. 4. In FIG. 2 and FIG. 3, illustration of outside connection terminals selectively provided on a rear surface of the wiring board is omitted.
In the semiconductor device 10 shown in FIG. 1, if the underfill material 5 is cured by heating, the underfill material 5 shrinks upon being cured.
The underfill material 5 and the wiring board 1 which is an organic board, have coefficients of thermal expansion greater than that of the semiconductor element 4. Accordingly, if the underfill material is cured by heating and the temperature returns to the room temperature after curing is completed, the underfill material 5 and the wiring board 1 shrink greater than the shrinkage of the semiconductor element 4 while each structural member has a small internal stress.
As a result of this, as shown in FIG. 2, a curve is generated where a semiconductor element 4 side is concave. At this time, the internal stress of each structural member becomes greater.
If a temperature cycle test (drastic temperature change) and/or a moisture absorption reflow test (heating after moisture is absorbed in a high temperature humidistat environment) are/is applied to the curved semiconductor device 10, delamination may be generated at an interface (a part indicated by arrows in FIG. 2) between the fillet part of the underfill material 5 positioned in the periphery of the semiconductor element 4 and the dam 6.
Such delamination expands from a part where the delamination is generated as a starting point. As a result of this, moisture may enter inside the semiconductor device via the part where delamination is generated. Due to entry of the moisture, corrosion and/or breakage may occur at a wiring inside the semiconductor device 10 and/or the convex outside connection terminal 3.
The above-discussed problem is more serious when the number of the structural members is increased so that the mechanical structure is complex. For example, when a large sized semiconductor element having a large number of terminals is flip-chip mounted and/or when an outside connection terminal is provided in the periphery of the semiconductor element mounted on the wiring board so that a stacked type semiconductor device such as an SiP (System in Package) type semiconductor device is formed, the above-discussed problem is more serious.
In addition, in order to correspond to demand for high density mounting of the semiconductor devices in the electronic apparatus, miniaturization of the semiconductor devices is attempted.
On the other hand, the underfill material 5 protects the circuit forming surface of the semiconductor element 4 and the convex outside connection terminals 3 and reinforces the connection between the wiring board 1 and the semiconductor element 4 so that the connection reliability of the wiring board 1 and the semiconductor element 4 is secured and improved. More specifically, an area where the wiring board 1 and the fillet A of the underfill material 5 come in contact with each other, namely the sloped expanding area in the periphery of the semiconductor element 4, influences on the connection reliability between the wiring board 1 and the semiconductor element 4. See FIG. 3(a).
Therefore, if an inside wall side surface of the dam is positioned close to the semiconductor element 4 in order to miniaturize the semiconductor device 10, expansion of the fillet A is small so that the connection reliability between the wiring board 1 and the semiconductor element 4 may not be realized.
On the other hand, in order to miniaturize the semiconductor device 10, as shown in FIG. 3(b), the width of the dam 6 may be shortened without changing the size of the fillet A.
However, according to the structure shown in FIG. 3(b), when the width of the dam 6′ is less than the height of the dam 6′, the stress is concentrated at the interface (a surface indicated by an arrow in FIG. 3(b)) of the dam 6′ and the surface of the wiring board 1, so that delamination of the dam 6′ at the interface or crack at the dam 6′ and/or the wiring board 1 may be generated.
If such delamination or crack is generated, moisture may enter from the generation part to inside the semiconductor device. As a result of this, corrosion and/or breakage may happen at a wiring inside the semiconductor device 10′ and/or the convex outside connection terminal 3 so that desirable reliability cannot be obtained. In addition, depending on the material forming the dam 6′, collapse of the dam 6′ may happen.
On the other hand, the structure discussed in the above-mentioned Japanese Laid-Open Patent Application Publication No. 2005-175113, that is a structure where the fillet may be made large by providing the dam far from the semiconductor element at four corners where the stress may be concentrated, is effective from the view point of improving the reliability of the connection. However, such a structure does not consider the miniaturization of the semiconductor device.
On the other hand, as an example of the high density mounting of the semiconductor device, a POP (Package On Package) type semiconductor device where plural semiconductor devices are stacked is suggested.
As shown in FIG. 4, in the POP type semiconductor device, a semiconductor device 20 is mounted on the semiconductor device 10. In the semiconductor device 10, the semiconductor element 4 is flip-chip mounted on the wiring board 1. The semiconductor device 20, comparing a semiconductor element 9 mounted on an upper surface of a wiring board 8, is connected to the semiconductor device 10 via outside connection terminals 13. The wiring board 8 and the semiconductor element 9 are connected to each other by bonding wires 11.
Under this structure, in the semiconductor device 20, the upper surface of the wiring board 8 including the semiconductor element 9 and the bonding wires 11 are sealed by sealing resin 12. On the other hand, the outside connection terminals 13 such as spherical electrode terminals provided on surfaces of electrodes selectively formed are provided at parts corresponding to the outside connection terminals 7 of the semiconductor device 10 of the lower surface of the wiring board 8.
The outside connection terminals 13 of the semiconductor device 20 are connected to the outside connection terminals 7 of the semiconductor device 10 so that the semiconductor device 20 is stacked on the semiconductor device 10. In addition, outside connection terminals 14 such as spherical electrode terminals provided on surfaces of electrodes selectively formed are provided on the rear surface of the wiring board 1 of the semiconductor device 10.
Under this structure, when the temperature is changed, due to the difference of coefficients of thermal expansion among the structural members, as shown in FIG. 4, a curve is formed in the semiconductor device 10 so that the semiconductor element 4 side is convex. On the other hand, in the semiconductor device 20, a curve is formed so that the wiring board side 8 is concave.
As a result of this, the internal stress in each structural member becomes great so that delamination at the interface of the dam 6 and the fillet part of the underfill material 5 positioned in the periphery of the semiconductor element 4 may be generated.
Even in such a POP type semiconductor device, miniaturization of the size is in high demand as is providing the outside connection terminals 7 close to the semiconductor element 4. In addition, in the structure shown in FIG. 4, in a case where a capacitive element or the like is connected to the outside connection terminal 7 of the wiring board instead of a case where the semiconductor device 20 is mounted on the semiconductor device 10, there is demand to provide the outside connection terminals 7 close to the semiconductor element 4 so that electric properties of the semiconductor device 10 are improved.
In this case, it is necessary to arrange the dam 6 provided between the outside connection terminals 7 and the semiconductor element 4 close to the semiconductor element 4 on the wiring board 1. Therefore, sufficient expansion of the fillet A cannot be obtained and thereby the reliability of connection of the wiring board 1 and the semiconductor element 4 may be degraded.
If the size of the fillet A is maintained by reducing the width of the dam 6, the stress may be concentrated at the interface of the dam 6 and the surface of the wiring board 1. Therefore, the delamination of the dam 6 at the interface or a crack at the dam 6 and/or the wiring board 1 may be generated in the vicinity of the interface.